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Preliminary
Product Description
Sirenza Microdevices' SZA-6044 is a high linearity Class A GaAs Heterojunction Bipolar Transistor (HBT) amplifier housed in a low-cost surface-mountable plastic package. These HBT amplifiers are fabricated using molecular beam epitaxial growth technology which produces reliable and consistent performance from wafer to wafer and lot to lot. This product is specifically designed as a driver or final stage amplifier for equipment in the 5.1 - 5.9 GHz band. It can run from a 3V to 5V supply. Load line optimization for target band is possible outside the package. Its high linearity makes it an ideal choice for multicarrier and digital applications.
SZA-6044
5.1 - 5.9 GHz 1/4 Watt Power Amplifier with Active Bias
4mm x 4mm QFN Package
Product Features
Functional Block Diagram
VPC1 2 0 VPC2 1 9 Vbias 1 8 VC1 1 7 NC 1 6 NC RFOUT RFOUT RFOUT NC
NC NC RFIN RFIN NC
1 2 3 4 5
1 5
Active Bias
1 4 1 3 1 2
* * * * * * * * * *
Single 3V to 5V operation High Linearity Class A OIP3 = 39dBm @ 5V 802.11a 54Mb/s Pout = 17dBm @ 3% EVM P1dB 24dBm @ 5V, 21dBm @ 3.3V Surface Mount Plastic Package Power up/down control < 1s
Applications
OFDM Multicarrier applications 802.11a WLAN Driver Stage Fixed Wireless, UNII
Unit MHz Min. 5100 24.9 dBm 22.5 17.0 dB 14.9 dB dB dBm dBm dB mA C/W 145 8 12 37 24.6 24.0 18.5 17.3 16.4 11 17 39 17 7.8 165 56 9.8 185 17.9 26.0 20.0 Typ. Max. 5900
1 1
6 NC
7 NC
8 NC
9 NC
1 0 NC
Key Specifications
Symbol fO P1dB Parameters: Test Conditions, With App Circuit Z0 = 50, VCC = 5.0V, I = 165mA, TBP = 30C) Frequency of Operation Output Power at 1dB Compression - 5.1 GHz Output Power at 1dB Compression - 5.5 GHz Output Power at 1dB Compression - 5.9 GHz Small Signal Gain - 5.1 GHz S21 IRL ORL OIP3 Pout NF ISUPPLY Rth, j-l Small Signal Gain - 5.5 GHz Small Signal Gain - 5.9 GHz Worst Case Input Return Loss 5.1-5.9GHz Worst Case Output Return Loss 5.1-5.9GHZ Output IP3, Pout per tone = +8dBm @ 5.9 GHz 802.11a 54Mb/s Pout @ 3% EVM @ 5.9GHz, I = 165mA Noise Figure @ 5.9 GHz Total Device Current, IVBIAS + ICTOTAL = 150mA IVPC12 = 15mA Thermal Resistance (junction - lead)
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 1
http://www.sirenza.com EDS-103535 Rev E
Preliminary SZA-6044 5.1-5.9 GHz 1/4 W Amplifier
Pin Out Description
Pin # 1,2,5,6, 7,8,9,10, 11,15,16 19 20 18 3,4 Function N/C VPC2 VPC1 VBIAS RFIN Description Pins are not used. May be grounded, left open or connected to adjacent pin. VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. VPC1 is the control pin for the stage 1 active bias circuits. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. VBIAS is the active bias circuit supply voltage. Can be operated from 3V to 5V. RF input pin. This is DC grounded internal to the IC. Do not apply voltage to this pin. Both pins 3 and 4 must be used for proper operation. RF output and second stage collector supply voltage pin. VC2 in the range of 3V to 5V voltage should be supplied to this pin through an external RF choke. Because DC biasing is present on this pin, a DC blocking capacitor should be used in most applications (see evaluation board schematic). The supply side of the bias network should be well bypassed. The output network and board layout specified in the app circuit is recommended for optimum performance. All pins 12-14 are required to be wired together at lead foot for proper operation. VC1 is the first stage collector supply voltage. Can be operated over the range of 3V to 5V. Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the recommended land pattern (page 5).
12,13,14
RFOUT/ VC2
17 EPAD
VC1 Gnd
Simplified Device Schematic Absolute Maximum Ratings
Parameters
N/C 1 5 7 9 11 16 2 6 8 10 15 VPC1 20 Active Bias VC1 17 VPC2 19 Active Bias RF OUT/ VC2 12 Q2 RF IN 3 4 Q1 13 14 VBIAS 18
Value 100 190 6.0 1.5 -40 to +85 20 -40 to +150 +150 500
Unit mA mA V W C dBm C C V
1st Stage Collector Bias Current (IVC1) 2nd Stage Collector Bias Current (IVC2) Device Voltage (VD) Power Dissipation Operating Lead Temperature (TL) RF Input Power Storage Temperature Range Operating Junction Temperature (TJ) ESD Human Body Model - Class 1B
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias conditions should also satisfy the following expression: IDVD < (TJ - TL) / RTH' j-l
Caution: ESD Sensitive - Class 1B
Appropriate precaution in handling, packaging and testing devices must be observed.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 2
http://www.sirenza.com EDS-103535 Rev E
Preliminary SZA-6044 5.1-5.9 GHz 1/4 W Amplifier
5.1 - 5.9 GHz Evaluation Board Data (VBIAS = 5.0V, IBIAS = 165mA)
Input/Output Return Loss, Isolation vs Frequency +25c
-10
Output Thrid Order Intercept vs Frequency (Pout/tone = 2dBm)
42.0 41.0 40.0
S11
-15
Return Loss (dB)
-20 -25 -30 -35
S22
OIP3 (dBm)
39.0 38.0 37.0 36.0 35.0 34.0 33.0 32.0 5100
S12
-40 -45 5100
+25c -40c +85c
5200
5300
5400
5500
5600
5700
5800
5900
5200
5300
5400
5500
5600
5700
5800
5900
Frequency(MHz)
Frequency (MHz)
Device Current vs Source Voltage
0.30 0.25 Device Current(A) 0.20 0.15 0.10 0.05 0.00 0 1 2 3 Vcc(V) 4 5 6 +25c -40c +85c
P1 (dBm)
P1dB vs Frequency
26.0 25.8 25.5 25.3 25.0 24.8 24.5 24.3 24.0 23.8 23.5 23.3 23.0 5100 5300 5500 Frequency (MHz) 5700 5900
+25c -40c +85c
Gain vs Temp
22 21 20 19
25 15 5 dB -5 -15 -25
5300 5400 5500 5600 5700 5800 5900
Broadband Gain, Input/Output Return Loss vs Frequency +25c S11 S21 S22
Gain (dB)
18 17 16 15 14 13 12 5100
+25c -40c +85c
5200
-35 1 2 3 4 5 6
Frequency (GHz)
Frequency(MHz)
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 3
http://www.sirenza.com EDS-103535 Rev E
Preliminary SZA-6044 5.1-5.9 GHz 1/4 W Amplifier
802.11a 64QAM 54Mb/s Error Vector Magnitude Data (VBIAS = 5.0V, IBIAS = 165mA)
EVM Burst Average% vs Output Power (dBM) Freq = 5.15GHz
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 2 4
+25c -40c +85c
EVM Burst Average% vs Output Power (dBM) Freq = 5.35GHz
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 2 4
+25c -40c +85c
BAVG%
BAVG%
6
8
10
12
14
16
18
20
6
8
10
12
14
16
18
20
Output power (dBm)
Output power (dBm)
EVM Burst Average% vs Output Power (dBM) Freq = 5.725GHz
5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 2 4
EVM Burst Average% vs Output Power (dBM) Freq = 5.875GHz
5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 2 4
+25c -40c +85c
+25c -40c +85c
BAVG%
6
8
10
12
14
16
18
20
BAVG%
6
8
10
12
14
16
18
20
Output power (dBm)
Output power (dBm)
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 4
http://www.sirenza.com EDS-103535 Rev E
Preliminary SZA-6044 5.1-5.9 GHz 1/4 W Amplifier
5.1 - 5.9 GHz Evaluation Board Schematic For 5V Supply
RF INPUT INTERNALLY GROUND. USE DC BLOCK IF EXTERAL DC VOLTAGE IS PRESENT.
5.1 - 5.9 GHz Evaluation Board Layout For 5V - Board material GETEK, 31mil thick, Dk=3.9, 2 oz. copper
R1 R2 C5 Q1 C3 C2
C1
L1 C4
Zo=50 V ,54.2 8 @ 5.5GHz Zo=29 V ,22.3 8 @ 5.5GHz Zo=29 V ,38.4 8 @ 5.5GHz Zo=13 V ,16 8 @ 5.5GHz
Note: For 3.3V 140mA operation, lower V+ to 3.3V and change R1 and R2 to 50 ohm. RF Performance at 3.3V, 140mA: Gain increases 0.5dB, IP3 drops ~ 3dB and P1dB drops ~3dB relative to 5V data. Return loss is essentially unchanged relative to 5V data. Contact factory for more details.
303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 5 http://www.sirenza.com EDS-103535 Rev E
Preliminary SZA-6044 5.1-5.9 GHz 1/4 W Amplifier
Part Number Ordering Information
Part Number SZA-6044 Reel Size 13" Devices/Reel 3000
Part Symbolization
The part will be symbolized with an "SZA-6044" marking designator on the top surface of the package.
Package Outline Drawing
SZA 6044 LOT ID
Recommended Land Pattern (dimensions in mm[in]):
1.58 [0.062] 0.50 [0.020] 0.26 [0.010] 0.38 [0.015] 0.29 [0.011] 1.58 [0.062] 0.21 [0.008]
Recommended PCB Soldermask (SMBOC) for Land Pattern (dimensions in mm[in]):
0.75 [0.030] 0.005 CHAMFER (8PL)
O0.38 [O0.015] Plated Thru (4PL)
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 6
http://www.sirenza.com EDS-103535 Rev E

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